
Welcome to STYNQ!

Note that this is a pre-release, and so there may be many issues,
especially on untested hardware or operating systems.  Let me know!
ross@bxbsp.com.  Currently it is tested with an x86 build machine
running Ubuntu 24.04, and an RFSoC4x2 board.


The build.sh file in this directory creates the files needed on a
bootable SD Card for a Xilinx ZYNQMP MPSoC or RFSoC system.

***************************************************************************
**   Linux Kernel
***************************************************************************

The directory "kernel" compiles a mainline Linux kernel for use with
STYNQ.  All the most important options are selected to support Xilinx
processors.  However, it is also easy to change options and recompile.

The kernel is automatically picked up to make the boot files; it goes
into image.ub.

A module "dtbocfg" is also produced.  This must be copied into the
appropriate place in the Linux filesystem, so that it can be loaded
at runtime.  This enables dynamic changes to the device tree, which
in particular are needed to trigger dynamic loading of the PL.

Dynamic changes to the device tree are also necessary for some Xilinx
drivers, such as the one that drives the ADC/DAC on RFSoC boards.
However, STYNQ bypasses that need by accessing the ADC/DAC driver in a
way that doesn't require device tree changes.


***************************************************************************
**   BOOT FILES
***************************************************************************

The directory "boot" contains the files for converting an XSA file
produced by Vivado (Using File->Export->Export Hardware) into working
boot files,

BOOT.BIN   BOOT.SCR   image.ub

The XSA file coming from Vivado must have a block design with the ZYNQ
IP block inserted and properly configured.  See appropriate STYNQ docs
regarding configuring the ZYNQ block, if your block isn't automatically
configured by using a BSP.

Note that the XSA for creating boot files doesn't need to be the exact
same XSA as your PL design, so long as they have identically configured
ZYNQ processor blocks.

***************************************************************************
**   Debian Linux Filesystem
***************************************************************************

The directory "filesystem" contains scripts to fetch a minmial Debian
Linux filesystem, that gets you going with console login via serial
and ssh login over ethernet.  That can then be booted and additional
software can be installed using "apt".

***************************************************************************
**   C++ FILES
***************************************************************************

The exact XSA file from your PL design is put into the
xsa_to_c++/inputs directory, and the process in this directory
converts it into C++ .hh and .cc files with proper definitions for PL
devices on the AXI bus.  These provide information used by your C++
program to access the hardware.  In particular, the C_BASEADDR of each
device is provided, to know where its memory map starts.  This
information must be supplemented by device-specific information,
such as the register map, in order to drive the hardware.

***************************************************************************
***************************************************************************

These files are enough to get a board booting, so that you can log
into it with ssh and start writing programs.

Note that actually doing anything on a board requires some knowledge
of how LEDs are connected, or other output devices.  Examples are
provided for the RFSoC4x2 board, in a separate directory, as they are
not part of the STYNQ base.  XSA files from those examples are here
though, as processing them uses build flows that are common for all
boards, and are thus part of the STYNQ base.

Examples for other boards may be provided at a later date.
